Work Experience
0.2 yr
GRE
331
Academics & Work Experience
Undergrad Details
Electronics and Communication Engineering
Delhi Technological University
8.21
Aggregate score and pattern
Work Experience(1)
Verification Engineer
Internship
Cadence Design Systems
May 2019 to July 2019 (2 months)
Skills(7)
Verilog HDL
System Verilog
Digital Circuit Design
Vlsi Design
VLSI
Xilinx Vivado
Adobe Premiere Pro
SUBSCRIBE TO OUR NEWS LETTER
COLLEGE NOTIFICATIONSEXAM NOTIFICATIONSNEWS UPDATES
Download the Collegedunia app on 
© 2024 Collegedunia Web Pvt. Ltd. All Rights Reserved